1. Field
The present disclosure relates to a vertical cell-type semiconductor device having a protective pattern, and/or a method of fabricating the same.
2. Description of Related Art
As integrated circuits are downscaled faster and faster, a vertical cell-type semiconductor device in which components formed in a vertical direction, has been proposed.
In a process of fabricating the vertical cell-type semiconductor device, it may be desirable to limit (and/or prevent) the components of the semiconductor device from being damaged by an etchant used to remove sacrificial layers, and to reduce (and/or minimize) voids or seams from being present in gate electrodes when the gate electrodes are formed.